The present invention relates to a digital to analog converter (D/A converter) suitable for a complementary metal oxide semiconductor (CMOS) integrated circuit.
A D/A converter has been proposed which comprises a voltage dividing part having a plurality of resistors connected in series between two reference voltage terminals, and a switch array comprising a plurality of switching elements of 2 inputs and 1 output connected between the voltage dividing points of the voltage dividing part and the output terminals, each switching element producing one input voltage according to a supplied digital signal so that a voltage across one voltage dividing point according to the supplied digital signal may be produced. Various semiconductor devices have recently become integrated and D/A converters of the type having this construction are also required to be integrated on a single semiconductor chip. Since many of the semiconductor integrated circuits are CMOS circuits, it is preferable that the switch array part of the D/A converter is constituted by CMOS transmission gates. The transmission gate preferably comprises a CMOS since a MOS transmission gate of a single channel cannot provide a wide range of voltages to be transmitted.
The CMOS transmission gate comprises p-type channel MOSFET (PMOSFET) and n-type channel MOSFET (NMOSFET) connected in parallel between input and output terminals. Digital control signals CS and their corresponding inverted signal CS are supplied to the gates of the respective MOSFETs for simultaneously rendering both MOSFETs conductive or nonconductive for controlling the transmission of voltage from the input terminals to the output terminals. The CMOS transmission gate is defective in that its area on the chip is greater than in the case of an MOS transmission gate of a single channel. A chip of general size (3-5 mm on a side) may not be satisfactorily used for a CMOS D/A converter of, for example, over 5 bits, resulting in higher cost.
The back gate of the NMOSFET is grounded when the CMOS transmission gate is formed on an n-type substrate, and the back gate of the PMOSFET is connected to the power source voltage so that the resistance between the source and drain of the MOSFETs constituting the CMOS transmission gate, that is, the ON resistance, is dependent on the input voltage. The back gate biasing effect of the CMOSFET circuit becomes significant especially when the input voltage is half the power source voltage, and the ON resistance becomes very high. Consequently, the response time becomes long and the operation of the D/A converter may not be of high speed, resulting in inconvenience.